Blocks for analog value processing

Reacting to measured signals from analog sensors according to the application program and to drive analog actuators is an important task of the control technique. As controls can only process digital signals, analog-digital-converters (ADCs) and digital-analog-converters (DACs) are required as intermediate elements.

After the conversion, the values digitalized in the ADC must often be adapted to the conditions of the used control (e.g. adaptation of the value range). On the other side, many application cases require to correspondingly process the values calculated by the control prior to the digital-analog conversion. Analog value processing in a PLC means to adapt the various value ranges of analog sensors and actors to the digital value range of the control CPU.

The function blocks described here can be used for such adaptation purposes. In addition, the library that can be downloaded at the end of this page, contains some more FBs for analog value processing.

Adaptation of 8-bit-bipolar analog data: AI8BIW

The function block AI8BIW converts the data of a bipolar 8-bit ADC to the PLC's value range. The bit pattern to be adapted has to be applied at the BYTE input 'in_byte'. The scaling of the value range (starting at 0) is defined by the value of the REAL variable connected to 'endwert_real'.

Programming language: Function Block Diagram FBD (double-click the FB symbol to open the code body). The block is also available in ST (SAI8BIW).
The following figure shows the code of the function block in online mode: The decimal value 196 is applied as Byte to input 'in_byte' (display in binary format: 11000100).

Mode of operation: First, the applied 8-Bit-pattern is converted into a REAL value (see 'monitor1'). Then, the conversion from unipolar to bipolar value range follows by subtracting 128.0 (result is stored in 'monitor2'). The following division reduces the final value to a maximum of 1.0 (see intermediate variable 'monitor3'). This value is then scaled to the desired value range by multiplying it with the factor 'endwert_real' and then stored to the output variable.

Adaptation of 12-bit-unipolar analog values and transformation of the value range: AI12UW

The FB AI12UW transforms the data of an unipolar 12-bit-ADC into the value range defined by the REAL input variables 'obergrenze_real' (= upper limit) and 'untergrenze_real' (= lower limit).

Programming language: Function Block Diagram FBD (double-click the FB symbol to open the code body). The block is also available in ST (SAI12UW).
The following figure shows the code of the function block in online mode:

Mode of operation: First, the 12 significant bits of the applied pattern are "isolated" by the AND masking at the beginning of the network and then converted to the data type REAL. The bit pattern is then available in variable 'monitor1' as floating point value in the value range of 0 to 4095.0. The following DIV function uses the number of quantization levels (4096) as quotient. This way, variable 'monitor2' receives the input value as fraction of the maximum value. This value is multiplied with variable 'bereich' (=range) which has been calculated before by subtraction of both user-defined limit values of the value range. Thus, 'monitor3' contains the desired value range. The lower range limit is determined by adding 'monitor3' and 'untergrenze_real'.

Data output to a bipolar 12-bit DAC: AO12BIW

The function FAO12BIW converts the applied input data within a value range of -10000 to +10000 into WORD format. This way, these values can be output via a bipolar 12-bit-DAC.
The following example relates to the analog Interbus S output module IB ST 24 AO (4 channel, 12 bit resolution, bipolar voltage output in a range of -10V...0V...+10V).

Programming language: Function Block Diagram FBD (double-click the block symbol to open the code body).

Mode of operation: First, a limiter function ensures that the value 'in_real' does not exceed the set maximum/minimum limits (-10000/+10000): In case of values > 10000, the output is set to 10000. In accordance, the output is set to -10000, if the input value is below the minimum limit.
The analog module requires a left-justified 12-bit pattern. As a result, the output value range for bipolar converters reaches from -2048 to +2047. The necessary compression to the correct value range is done by the DIV function. Afterwards, the conversion of the compressed value to the WORD format is made. Finally, this WORD is shifted to the left by 4 digits.

Loading analog values from multiplex channels: MPXLES

The block MPXLES is a multiplexer used for cyclic reading of data from 16 input channels. At its output 'control_word', it delivers a cyclic control information in WORD format which indicates the number of the input analog channel (0 to 15) that is read. The 'control_word' contains the binary coded channel address C0...C3, structured as follows: 0 0 0 0 C3 C2 C1 C0 0 0 0 0 0 0 0 0.
The multiplexer generates this variable cyclically, reads the related analog values into a table and then applies this table to its output 'tab_analogwerte' (= table analog values; user defined data type TAB16WORD).

The following block STABWOR expands the analog table into 16 outputs and applies one WORD per channel to the corresponding output.
Programming language: Both FBs are written in ST (Structured Text). Function Block Diagram FBD (double-click the FB symbols to open the related code body).

Mode of operation, FB SMPXLES: The multiplex operation is controlled by 2 pulse sequences: 'zykpuls' and 'spur_a'. 'zykpuls' changes its state with each program cycle and 'spur_a' with every second cycle. If both control pulses are TRUE, 'zaehler' (= counter) is incremented by 1. The modulo operation avoids that 'zaehler' becomes > 15. In the following channel selection, the channel number 'kanal-nr' is derived from 'zaehler' by a simple type conversion. The resulting Integer value is shifted to the left by 8 bits in order to create the control word (see structure of the 'control_word' above). If 'spur_a' is FALSE again, the analog value of the selected channel is read and stored in the table using the index 'zaehler'.

Threshold value switch with hysteresis: GT_HY1 and GT_HY2

The term hysteresis means the persistence of an impact in a system even if the cause does not exist anymore. Transferred to the field of control engineering this means, that, for example, the switching behavior (on/off) of a network occurs at different threshold values. For that purpose, two thresholds have to be defined, e.g. 'lower_limit' and 'upper_limit'. The output is set if the incoming value > 'upper_limit' but it is not reset until the input falls below 'lower_limit'. Example: A blower is switched on if the measured temperature exceeds a particular upper threshold value (determined by a comparison function). However, it should not be switched off until the environment temperature falls below a threshold which is lower than the "switch on value", i.e. if it is cooler than it was when the blower was switched on.

The library provides two blocks with switch hysteresis: GT_HY1 and GT_HY2. Both blocks are intended for the same purpose. However, GT_HY2 allows to set the middle threshold and the hysteresis externally.
Programming language: Both FBs are written in FBD (Function Block Diagram). Double-click the FB symbols to open the related code body.

Mode of operation: First, the Integer input value 'input_int' is limited to the maximum value range 0...100 and then applied to the comparison function GT (greater than). The comparison result is calculated by adding the Integer input value 'mittlere_schwelle_int' (= middle threshold) and the hysteresis value. As long as 'input_int' is smaller than the upper threshold ('gt_output' = FALSE), 'hysterese_int' is directly led to the adder. Otherwise (if 'gt_output' = TRUE), the upper threshold is calculated by ('hysterese_int' + 'mittlere_schwelle_int') and the lower threshold by ('hysterese_int' + (-'mittlere_schwelle_int')).
This means: If 'gt_output' is set to TRUE because the input signal 'input_int' exceeds the lower threshold, 'input_int' must at least fall below the upper threshold by the double hysteresis value in order to switch 'gt_output' back to FALSE.

Sample-and-Hold element: SA_HLD

The function of the block SA_HLD can be compared to a sample-and-hold circuit for voltages. With a rising edge at input 'control', the value applied at the REAL input 'in_real' is passed to the output 'out_real' and kept there until the next rising edge occurs at 'control'.

Programming language: Structured Text (double-click the FB symbol to open the code body).

The figure shows the FBD network as well as the ST code of the FB in online mode. The input value of the S&H FB is provided by a sawtooth generator, the S&H element is activated by pressing the contact 'hold'. (In a special extended online mode of MULTIPROG, the value of Boolean variables can be toggled by clicking the variable in the online worksheet.)

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